Expand description
The kernel configuration as const items.
While this module can be used as an alternative to the sel4_cfg_*! macros for accessing
the kernel configuration at the value level, its primary purpose is to provide a reference
within Rustdoc for the active configuration. Towards that end, the generated source of this
module is also provided in this module’s Rustdoc to make browsing easier.
pub const AARCH32_FPU_ENABLE_CONTEXT_SWITCH: bool = true;
pub const AARCH64_SERROR_IGNORE: bool = false;
pub const AARCH64_USER_CACHE_ENABLE: bool = true;
pub const AARCH64_VSPACE_S2_START_L1: bool = false;
pub const ALLOW_SMC_CALLS: bool = false;
pub const ARCH: &str = "arm";
pub const ARCH_AARCH32: bool = true;
pub const ARCH_AARCH64: bool = false;
pub const ARCH_ARM: bool = true;
pub const ARCH_ARM_HYP: bool = false;
pub const ARCH_ARM_V7A: bool = true;
pub const ARCH_ARM_V7VE: bool = true;
pub const ARCH_ARM_V8A: bool = false;
pub const ARCH_IA32: bool = false;
pub const ARCH_RISCV32: bool = false;
pub const ARCH_RISCV64: bool = false;
pub const ARCH_X86_64: bool = false;
pub const ARM_CORTEX_A15: bool = true;
pub const ARM_CORTEX_A35: bool = false;
pub const ARM_CORTEX_A53: bool = false;
pub const ARM_CORTEX_A55: bool = false;
pub const ARM_CORTEX_A57: bool = false;
pub const ARM_CORTEX_A7: bool = false;
pub const ARM_CORTEX_A72: bool = false;
pub const ARM_CORTEX_A8: bool = false;
pub const ARM_CORTEX_A9: bool = false;
pub const ARM_ERRATA_430973: bool = false;
pub const ARM_ERRATA_773022: bool = true;
pub const ARM_GIC_V3_SUPPORT: bool = false;
pub const ARM_HIKEY_OUTSTANDING_PREFETCHERS: &str = "0";
pub const ARM_HIKEY_PREFETCHER_NPFSTRM: &str = "0";
pub const ARM_HIKEY_PREFETCHER_STBPFDIS: bool = false;
pub const ARM_HIKEY_PREFETCHER_STBPFRS: bool = false;
pub const ARM_HIKEY_PREFETCHER_STRIDE: &str = "0";
pub const ARM_HYPERVISOR_SUPPORT: bool = false;
pub const ARM_HYP_ENABLE_VCPU_CP14_SAVE_AND_RESTORE: bool = false;
pub const ARM_ICACHE_VIPT: &str = "";
pub const ARM_MACH: &str = "";
pub const ARM_PA_SIZE_BITS_40: bool = false;
pub const ARM_PA_SIZE_BITS_44: bool = false;
pub const ARM_PLAT: &str = "qemu-arm-virt";
pub const ARM_SMMU: bool = false;
pub const BENCHMARK_GENERIC: bool = false;
pub const BENCHMARK_TRACEPOINTS: bool = false;
pub const BENCHMARK_TRACK_KERNEL_ENTRIES: bool = false;
pub const BENCHMARK_TRACK_UTILISATION: bool = false;
pub const BINARY_VERIFICATION_BUILD: bool = false;
pub const CLZ_32: bool = false;
pub const CLZ_64: bool = false;
pub const CLZ_NO_BUILTIN: bool = false;
pub const COLOUR_PRINTING: bool = true;
pub const CTZ_32: bool = false;
pub const CTZ_64: bool = false;
pub const CTZ_NO_BUILTIN: bool = false;
pub const DANGEROUS_CODE_INJECTION: bool = false;
pub const DEBUG_BUILD: bool = true;
pub const DEBUG_DISABLE_BRANCH_PREDICTION: bool = false;
pub const DEBUG_DISABLE_L1_DCACHE: bool = false;
pub const DEBUG_DISABLE_L1_ICACHE: bool = false;
pub const DEBUG_DISABLE_L2_CACHE: bool = false;
pub const DEBUG_DISABLE_PREFETCHERS: bool = false;
pub const DISABLE_WFI_WFE_TRAPS: bool = false;
pub const ENABLE_A9_PREFETCHER: bool = false;
pub const ENABLE_BENCHMARKS: bool = false;
pub const ENABLE_SMP_SUPPORT: bool = true;
pub const EXCEPTION_FASTPATH: bool = false;
pub const EXPORT_PCNT_USER: bool = false;
pub const EXPORT_PMU_USER: bool = false;
pub const EXPORT_PTMR_USER: bool = false;
pub const EXPORT_VCNT_USER: bool = false;
pub const EXPORT_VTMR_USER: bool = false;
pub const FASTPATH: bool = true;
pub const FPU_MAX_RESTORES_SINCE_SWITCH: &str = "64";
pub const HARDWARE_DEBUG_API: bool = false;
pub const HAVE_FPU: bool = true;
pub const IRQ_REPORTING: bool = true;
pub const KERNEL_BENCHMARK: &str = "none";
pub const KERNEL_FWHOLE_PROGRAM: bool = false;
pub const KERNEL_INVOCATION_REPORT_ERROR_IPC: bool = false;
pub const KERNEL_LOG_BUFFER: bool = false;
pub const KERNEL_MCS: bool = false;
pub const KERNEL_OPTIMISATION_CLONE_FUNCTIONS: bool = true;
pub const KERNEL_OPT_LEVEL: &str = "-O2";
pub const KERNEL_OPT_LEVEL_O0: bool = false;
pub const KERNEL_OPT_LEVEL_O1: bool = false;
pub const KERNEL_OPT_LEVEL_O2: bool = true;
pub const KERNEL_OPT_LEVEL_O3: bool = false;
pub const KERNEL_OPT_LEVEL_OS: bool = false;
pub const KERNEL_STACK_BITS: &str = "12";
pub const L1_CACHE_LINE_SIZE_BITS: &str = "6";
pub const LIB_SEL4_DEFAULT_FUNCTION_ATTRIBUTES: bool = false;
pub const LIB_SEL4_FUNCTION_ATTRIBUTE: &str = "inline";
pub const LIB_SEL4_INLINE_INVOCATIONS: bool = true;
pub const LIB_SEL4_PRINT_INVOCATION_ERRORS: &str = "0";
pub const LIB_SEL4_PUBLIC_SYMBOLS: bool = false;
pub const LIB_SEL4_STUBS_USE_IPC_BUFFER_ONLY: bool = false;
pub const MAX_NUM_BOOTINFO_UNTYPED_CAPS: &str = "230";
pub const MAX_NUM_NODES: &str = "2";
pub const MAX_NUM_TRACE_POINTS: &str = "0";
pub const MAX_NUM_WORK_UNITS_PER_PREEMPTION: &str = "100";
pub const NO_BENCHMARKS: bool = true;
pub const NUM_DOMAINS: &str = "1";
pub const NUM_PRIORITIES: &str = "256";
pub const PADDR_USER_DEVICE_TOP: &str = "4294967295";
pub const PLAT: &str = "qemu-arm-virt";
pub const PLAT_ALLWINNERA20: bool = false;
pub const PLAT_AM335X: bool = false;
pub const PLAT_APQ8064: bool = false;
pub const PLAT_BCM2711: bool = false;
pub const PLAT_BCM2837: bool = false;
pub const PLAT_EXYNOS4: bool = false;
pub const PLAT_EXYNOS5: bool = false;
pub const PLAT_HIKEY: bool = false;
pub const PLAT_IMX6: bool = false;
pub const PLAT_IMX7: bool = false;
pub const PLAT_IMX7_SABRE: bool = false;
pub const PLAT_IMX8MM_EVK: bool = false;
pub const PLAT_IMX8MP_EVK: bool = false;
pub const PLAT_IMX8MQ_EVK: bool = false;
pub const PLAT_MAAXBOARD: bool = false;
pub const PLAT_OMAP3: bool = false;
pub const PLAT_QEMU_ARM_VIRT: bool = true;
pub const PLAT_TK1: bool = false;
pub const PLAT_TQMA8XQP1GB: bool = false;
pub const PLAT_ZYNQ7000: bool = false;
pub const PLAT_ZYNQMP: bool = false;
pub const PRINTING: bool = true;
pub const RESET_CHUNK_BITS: &str = "8";
pub const RETYPE_FAN_OUT_LIMIT: &str = "256";
pub const ROOT_CNODE_SIZE_BITS: &str = "20";
pub const SEL4_ARCH: &str = "aarch32";
pub const SET_TLS_BASE_SELF: bool = false;
pub const SIGNAL_FASTPATH: bool = false;
pub const SMMU_INTERRUPT_ENABLE: bool = false;
pub const TIMER_TICK_MS: &str = "2";
pub const TIME_SLICE: &str = "5";
pub const TK1_SMMU: bool = false;
pub const USER_STACK_TRACE_LENGTH: &str = "16";
pub const USER_TOP: &str = "0xa0000000";
pub const VERIFICATION_BUILD: bool = false;
pub const VTIMER_UPDATE_VOFFSET: bool = true;
pub const WORD_SIZE: &str = "32";Constants§
- AARC
H32_ FPU_ ENABLE_ CONTEXT_ SWITCH - AARC
H64_ SERROR_ IGNORE - AARC
H64_ USER_ CACHE_ ENABLE - AARC
H64_ VSPACE_ S2_ START_ L1 - ALLOW_
SMC_ CALLS - ARCH
- ARCH_
AARC H32 - ARCH_
AARC H64 - ARCH_
ARM - ARCH_
ARM_ HYP - ARCH_
ARM_ V7A - ARCH_
ARM_ V7VE - ARCH_
ARM_ V8A - ARCH_
IA32 - ARCH_
RISC V32 - ARCH_
RISC V64 - ARCH_
X86_ 64 - ARM_
CORTEX_ A7 - ARM_
CORTEX_ A8 - ARM_
CORTEX_ A9 - ARM_
CORTEX_ A15 - ARM_
CORTEX_ A35 - ARM_
CORTEX_ A53 - ARM_
CORTEX_ A55 - ARM_
CORTEX_ A57 - ARM_
CORTEX_ A72 - ARM_
ERRATA_ 430973 - ARM_
ERRATA_ 773022 - ARM_
GIC_ V3_ SUPPORT - ARM_
HIKEY_ OUTSTANDING_ PREFETCHERS - ARM_
HIKEY_ PREFETCHER_ NPFSTRM - ARM_
HIKEY_ PREFETCHER_ STBPFDIS - ARM_
HIKEY_ PREFETCHER_ STBPFRS - ARM_
HIKEY_ PREFETCHER_ STRIDE - ARM_
HYPERVISOR_ SUPPORT - ARM_
HYP_ ENABLE_ VCPU_ CP14_ SAVE_ AND_ RESTORE - ARM_
ICACHE_ VIPT - ARM_
MACH - ARM_
PA_ SIZE_ BITS_ 40 - ARM_
PA_ SIZE_ BITS_ 44 - ARM_
PLAT - ARM_
SMMU - BENCHMARK_
GENERIC - BENCHMARK_
TRACEPOINTS - BENCHMARK_
TRACK_ KERNEL_ ENTRIES - BENCHMARK_
TRACK_ UTILISATION - BINARY_
VERIFICATION_ BUILD - CLZ_32
- CLZ_64
- CLZ_
NO_ BUILTIN - COLOUR_
PRINTING - CTZ_32
- CTZ_64
- CTZ_
NO_ BUILTIN - DANGEROUS_
CODE_ INJECTION - DEBUG_
BUILD - DEBUG_
DISABLE_ BRANCH_ PREDICTION - DEBUG_
DISABLE_ L1_ DCACHE - DEBUG_
DISABLE_ L1_ ICACHE - DEBUG_
DISABLE_ L2_ CACHE - DEBUG_
DISABLE_ PREFETCHERS - DISABLE_
WFI_ WFE_ TRAPS - ENABLE_
A9_ PREFETCHER - ENABLE_
BENCHMARKS - ENABLE_
SMP_ SUPPORT - EXCEPTION_
FASTPATH - EXPORT_
PCNT_ USER - EXPORT_
PMU_ USER - EXPORT_
PTMR_ USER - EXPORT_
VCNT_ USER - EXPORT_
VTMR_ USER - FASTPATH
- FPU_
MAX_ RESTORES_ SINCE_ SWITCH - HARDWARE_
DEBUG_ API - HAVE_
FPU - IRQ_
REPORTING - KERNEL_
BENCHMARK - KERNEL_
FWHOLE_ PROGRAM - KERNEL_
INVOCATION_ REPORT_ ERROR_ IPC - KERNEL_
LOG_ BUFFER - KERNEL_
MCS - KERNEL_
OPTIMISATION_ CLONE_ FUNCTIONS - KERNEL_
OPT_ LEVEL - KERNEL_
OPT_ LEVEL_ O0 - KERNEL_
OPT_ LEVEL_ O1 - KERNEL_
OPT_ LEVEL_ O2 - KERNEL_
OPT_ LEVEL_ O3 - KERNEL_
OPT_ LEVEL_ OS - KERNEL_
STACK_ BITS - L1_
CACHE_ LINE_ SIZE_ BITS - LIB_
SEL4_ DEFAULT_ FUNCTION_ ATTRIBUTES - LIB_
SEL4_ FUNCTION_ ATTRIBUTE - LIB_
SEL4_ INLINE_ INVOCATIONS - LIB_
SEL4_ PRINT_ INVOCATION_ ERRORS - LIB_
SEL4_ PUBLIC_ SYMBOLS - LIB_
SEL4_ STUBS_ USE_ IPC_ BUFFER_ ONLY - MAX_
NUM_ BOOTINFO_ UNTYPED_ CAPS - MAX_
NUM_ NODES - MAX_
NUM_ TRACE_ POINTS - MAX_
NUM_ WORK_ UNITS_ PER_ PREEMPTION - NO_
BENCHMARKS - NUM_
DOMAINS - NUM_
PRIORITIES - PADDR_
USER_ DEVICE_ TOP - PLAT
- PLAT_
ALLWINNER A20 - PLAT_
AM335X - PLAT_
APQ8064 - PLAT_
BCM2711 - PLAT_
BCM2837 - PLAT_
EXYNO S4 - PLAT_
EXYNO S5 - PLAT_
HIKEY - PLAT_
IMX6 - PLAT_
IMX7 - PLAT_
IMX7_ SABRE - PLAT_
IMX8MM_ EVK - PLAT_
IMX8MP_ EVK - PLAT_
IMX8MQ_ EVK - PLAT_
MAAXBOARD - PLAT_
OMAP3 - PLAT_
QEMU_ ARM_ VIRT - PLAT_
TK1 - PLAT_
TQMA8XQ P1GB - PLAT_
ZYNQ7000 - PLAT_
ZYNQMP - PRINTING
- RESET_
CHUNK_ BITS - RETYPE_
FAN_ OUT_ LIMIT - ROOT_
CNODE_ SIZE_ BITS - SEL4_
ARCH - SET_
TLS_ BASE_ SELF - SIGNAL_
FASTPATH - SMMU_
INTERRUPT_ ENABLE - TIMER_
TICK_ MS - TIME_
SLICE - TK1_
SMMU - USER_
STACK_ TRACE_ LENGTH - USER_
TOP - VERIFICATION_
BUILD - VTIMER_
UPDATE_ VOFFSET - WORD_
SIZE