Module sel4_config::consts

The kernel configuration as const items.

While this module can be used as an alternative to the sel4_cfg_*! macros for accessing the kernel configuration at the value level, its primary purpose is to provide a reference within Rustdoc for the active configuration. Towards that end, the generated source of this module is also provided in this module’s Rustdoc to make browsing easier.

pub const AARCH32_FPU_ENABLE_CONTEXT_SWITCH: bool = false;
pub const AARCH64_SERROR_IGNORE: bool = false;
pub const AARCH64_USER_CACHE_ENABLE: bool = true;
pub const AARCH64_VSPACE_S2_START_L1: bool = false;
pub const ALLOW_SMC_CALLS: bool = false;
pub const ARCH: &str = "arm";
pub const ARCH_AARCH32: bool = false;
pub const ARCH_AARCH64: bool = true;
pub const ARCH_ARM: bool = true;
pub const ARCH_ARM_HYP: bool = false;
pub const ARCH_ARM_V7A: bool = false;
pub const ARCH_ARM_V7VE: bool = false;
pub const ARCH_ARM_V8A: bool = true;
pub const ARCH_IA32: bool = false;
pub const ARCH_RISCV32: bool = false;
pub const ARCH_RISCV64: bool = false;
pub const ARCH_X86_64: bool = false;
pub const ARM_CORTEX_A15: bool = false;
pub const ARM_CORTEX_A35: bool = false;
pub const ARM_CORTEX_A53: bool = true;
pub const ARM_CORTEX_A55: bool = false;
pub const ARM_CORTEX_A57: bool = false;
pub const ARM_CORTEX_A7: bool = false;
pub const ARM_CORTEX_A72: bool = false;
pub const ARM_CORTEX_A8: bool = false;
pub const ARM_CORTEX_A9: bool = false;
pub const ARM_ERRATA_430973: bool = false;
pub const ARM_ERRATA_773022: bool = false;
pub const ARM_GIC_V3_SUPPORT: bool = false;
pub const ARM_HIKEY_OUTSTANDING_PREFETCHERS: &str = "0";
pub const ARM_HIKEY_PREFETCHER_NPFSTRM: &str = "0";
pub const ARM_HIKEY_PREFETCHER_STBPFDIS: bool = false;
pub const ARM_HIKEY_PREFETCHER_STBPFRS: bool = false;
pub const ARM_HIKEY_PREFETCHER_STRIDE: &str = "0";
pub const ARM_HYPERVISOR_SUPPORT: bool = true;
pub const ARM_HYP_ENABLE_VCPU_CP14_SAVE_AND_RESTORE: bool = false;
pub const ARM_ICACHE_VIPT: bool = true;
pub const ARM_MACH: &str = "";
pub const ARM_PA_SIZE_BITS_40: bool = true;
pub const ARM_PA_SIZE_BITS_44: bool = false;
pub const ARM_PLAT: &str = "qemu-arm-virt";
pub const ARM_SMMU: bool = false;
pub const BENCHMARK_GENERIC: bool = false;
pub const BENCHMARK_TRACEPOINTS: bool = false;
pub const BENCHMARK_TRACK_KERNEL_ENTRIES: bool = false;
pub const BENCHMARK_TRACK_UTILISATION: bool = false;
pub const BINARY_VERIFICATION_BUILD: bool = false;
pub const BOOT_THREAD_TIME_SLICE: &str = "5";
pub const CLZ_32: bool = false;
pub const CLZ_64: bool = false;
pub const CLZ_NO_BUILTIN: bool = false;
pub const COLOUR_PRINTING: bool = true;
pub const CTZ_32: bool = false;
pub const CTZ_64: bool = false;
pub const CTZ_NO_BUILTIN: bool = false;
pub const DANGEROUS_CODE_INJECTION: bool = false;
pub const DEBUG_BUILD: bool = true;
pub const DEBUG_DISABLE_BRANCH_PREDICTION: bool = false;
pub const DEBUG_DISABLE_L1_DCACHE: bool = false;
pub const DEBUG_DISABLE_L1_ICACHE: bool = false;
pub const DEBUG_DISABLE_L2_CACHE: bool = false;
pub const DEBUG_DISABLE_PREFETCHERS: bool = false;
pub const DISABLE_WFI_WFE_TRAPS: bool = false;
pub const ENABLE_A9_PREFETCHER: bool = false;
pub const ENABLE_BENCHMARKS: bool = false;
pub const ENABLE_SMP_SUPPORT: bool = false;
pub const EXCEPTION_FASTPATH: bool = false;
pub const EXPORT_PCNT_USER: bool = true;
pub const EXPORT_PMU_USER: bool = false;
pub const EXPORT_PTMR_USER: bool = false;
pub const EXPORT_VCNT_USER: bool = false;
pub const EXPORT_VTMR_USER: bool = false;
pub const FASTPATH: bool = true;
pub const FPU_MAX_RESTORES_SINCE_SWITCH: &str = "64";
pub const HARDWARE_DEBUG_API: bool = false;
pub const HAVE_FPU: bool = true;
pub const IRQ_REPORTING: bool = true;
pub const KERNEL_BENCHMARK: &str = "none";
pub const KERNEL_FWHOLE_PROGRAM: bool = false;
pub const KERNEL_INVOCATION_REPORT_ERROR_IPC: bool = false;
pub const KERNEL_LOG_BUFFER: bool = false;
pub const KERNEL_MCS: bool = true;
pub const KERNEL_OPTIMISATION_CLONE_FUNCTIONS: bool = true;
pub const KERNEL_OPT_LEVEL: &str = "-O2";
pub const KERNEL_OPT_LEVEL_O0: bool = false;
pub const KERNEL_OPT_LEVEL_O1: bool = false;
pub const KERNEL_OPT_LEVEL_O2: bool = true;
pub const KERNEL_OPT_LEVEL_O3: bool = false;
pub const KERNEL_OPT_LEVEL_OS: bool = false;
pub const KERNEL_STACK_BITS: &str = "12";
pub const KERNEL_STATIC_MAX_PERIOD_US: &str = "0";
pub const KERNEL_WCET_SCALE: &str = "1";
pub const L1_CACHE_LINE_SIZE_BITS: &str = "6";
pub const LIB_SEL4_DEFAULT_FUNCTION_ATTRIBUTES: bool = false;
pub const LIB_SEL4_FUNCTION_ATTRIBUTE: &str = "inline";
pub const LIB_SEL4_INLINE_INVOCATIONS: bool = true;
pub const LIB_SEL4_PRINT_INVOCATION_ERRORS: &str = "0";
pub const LIB_SEL4_PUBLIC_SYMBOLS: bool = false;
pub const LIB_SEL4_STUBS_USE_IPC_BUFFER_ONLY: bool = false;
pub const MAX_NUM_BOOTINFO_UNTYPED_CAPS: &str = "230";
pub const MAX_NUM_NODES: &str = "1";
pub const MAX_NUM_TRACE_POINTS: &str = "0";
pub const MAX_NUM_WORK_UNITS_PER_PREEMPTION: &str = "100";
pub const NO_BENCHMARKS: bool = true;
pub const NUM_DOMAINS: &str = "1";
pub const NUM_PRIORITIES: &str = "256";
pub const PADDR_USER_DEVICE_TOP: &str = "1099511627776";
pub const PLAT: &str = "qemu-arm-virt";
pub const PLAT_BCM2711: bool = false;
pub const PLAT_BCM2837: bool = false;
pub const PLAT_FVP: bool = false;
pub const PLAT_HIKEY: bool = false;
pub const PLAT_IMX7: bool = false;
pub const PLAT_IMX8MM_EVK: bool = false;
pub const PLAT_IMX8MP_EVK: bool = false;
pub const PLAT_IMX8MQ_EVK: bool = false;
pub const PLAT_MAAXBOARD: bool = false;
pub const PLAT_ODROIDC2: bool = false;
pub const PLAT_ODROIDC4: bool = false;
pub const PLAT_QEMU_ARM_VIRT: bool = true;
pub const PLAT_QUARTZ64: bool = false;
pub const PLAT_ROCKPRO64: bool = false;
pub const PLAT_TQMA8XQP1GB: bool = false;
pub const PLAT_TX1: bool = false;
pub const PLAT_TX2: bool = false;
pub const PLAT_ZYNQMP: bool = false;
pub const PRINTING: bool = true;
pub const RESET_CHUNK_BITS: &str = "8";
pub const RETYPE_FAN_OUT_LIMIT: &str = "256";
pub const ROOT_CNODE_SIZE_BITS: &str = "12";
pub const SEL4_ARCH: &str = "aarch64";
pub const SET_TLS_BASE_SELF: bool = false;
pub const SIGNAL_FASTPATH: bool = false;
pub const SMMU_INTERRUPT_ENABLE: bool = false;
pub const TK1_SMMU: bool = false;
pub const USER_STACK_TRACE_LENGTH: &str = "16";
pub const VERIFICATION_BUILD: bool = false;
pub const VTIMER_UPDATE_VOFFSET: bool = true;
pub const WORD_SIZE: &str = "64";

Constants

• AARCH32_FPU_ENABLE_CONTEXT_SWITCH
• AARCH64_SERROR_IGNORE
• AARCH64_USER_CACHE_ENABLE
• AARCH64_VSPACE_S2_START_L1
• ALLOW_SMC_CALLS
• ARCH
• ARCH_AARCH32
• ARCH_AARCH64
• ARCH_ARM
• ARCH_ARM_HYP
• ARCH_ARM_V7A
• ARCH_ARM_V7VE
• ARCH_ARM_V8A
• ARCH_IA32
• ARCH_RISCV32
• ARCH_RISCV64
• ARCH_X86_64
• ARM_CORTEX_A7
• ARM_CORTEX_A8
• ARM_CORTEX_A9
• ARM_CORTEX_A15
• ARM_CORTEX_A35
• ARM_CORTEX_A53
• ARM_CORTEX_A55
• ARM_CORTEX_A57
• ARM_CORTEX_A72
• ARM_ERRATA_430973
• ARM_ERRATA_773022
• ARM_GIC_V3_SUPPORT
• ARM_HIKEY_OUTSTANDING_PREFETCHERS
• ARM_HIKEY_PREFETCHER_NPFSTRM
• ARM_HIKEY_PREFETCHER_STBPFDIS
• ARM_HIKEY_PREFETCHER_STBPFRS
• ARM_HIKEY_PREFETCHER_STRIDE
• ARM_HYPERVISOR_SUPPORT
• ARM_HYP_ENABLE_VCPU_CP14_SAVE_AND_RESTORE
• ARM_ICACHE_VIPT
• ARM_MACH
• ARM_PA_SIZE_BITS_40
• ARM_PA_SIZE_BITS_44
• ARM_PLAT
• ARM_SMMU
• BENCHMARK_GENERIC
• BENCHMARK_TRACEPOINTS
• BENCHMARK_TRACK_KERNEL_ENTRIES
• BENCHMARK_TRACK_UTILISATION
• BINARY_VERIFICATION_BUILD
• BOOT_THREAD_TIME_SLICE
• CLZ_32
• CLZ_64
• CLZ_NO_BUILTIN
• COLOUR_PRINTING
• CTZ_32
• CTZ_64
• CTZ_NO_BUILTIN
• DANGEROUS_CODE_INJECTION
• DEBUG_BUILD
• DEBUG_DISABLE_BRANCH_PREDICTION
• DEBUG_DISABLE_L1_DCACHE
• DEBUG_DISABLE_L1_ICACHE
• DEBUG_DISABLE_L2_CACHE
• DEBUG_DISABLE_PREFETCHERS
• DISABLE_WFI_WFE_TRAPS
• ENABLE_A9_PREFETCHER
• ENABLE_BENCHMARKS
• ENABLE_SMP_SUPPORT
• EXCEPTION_FASTPATH
• EXPORT_PCNT_USER
• EXPORT_PMU_USER
• EXPORT_PTMR_USER
• EXPORT_VCNT_USER
• EXPORT_VTMR_USER
• FASTPATH
• FPU_MAX_RESTORES_SINCE_SWITCH
• HARDWARE_DEBUG_API
• HAVE_FPU
• IRQ_REPORTING
• KERNEL_BENCHMARK
• KERNEL_FWHOLE_PROGRAM
• KERNEL_INVOCATION_REPORT_ERROR_IPC
• KERNEL_LOG_BUFFER
• KERNEL_MCS
• KERNEL_OPTIMISATION_CLONE_FUNCTIONS
• KERNEL_OPT_LEVEL
• KERNEL_OPT_LEVEL_O0
• KERNEL_OPT_LEVEL_O1
• KERNEL_OPT_LEVEL_O2
• KERNEL_OPT_LEVEL_O3
• KERNEL_OPT_LEVEL_OS
• KERNEL_STACK_BITS
• KERNEL_STATIC_MAX_PERIOD_US
• KERNEL_WCET_SCALE
• L1_CACHE_LINE_SIZE_BITS
• LIB_SEL4_DEFAULT_FUNCTION_ATTRIBUTES
• LIB_SEL4_FUNCTION_ATTRIBUTE
• LIB_SEL4_INLINE_INVOCATIONS
• LIB_SEL4_PRINT_INVOCATION_ERRORS
• LIB_SEL4_PUBLIC_SYMBOLS
• LIB_SEL4_STUBS_USE_IPC_BUFFER_ONLY
• MAX_NUM_BOOTINFO_UNTYPED_CAPS
• MAX_NUM_NODES
• MAX_NUM_TRACE_POINTS
• MAX_NUM_WORK_UNITS_PER_PREEMPTION
• NO_BENCHMARKS
• NUM_DOMAINS
• NUM_PRIORITIES
• PADDR_USER_DEVICE_TOP
• PLAT
• PLAT_BCM2711
• PLAT_BCM2837
• PLAT_FVP
• PLAT_HIKEY
• PLAT_IMX7
• PLAT_IMX8MM_EVK
• PLAT_IMX8MP_EVK
• PLAT_IMX8MQ_EVK
• PLAT_MAAXBOARD
• PLAT_ODROIDC2
• PLAT_ODROIDC4
• PLAT_QEMU_ARM_VIRT
• PLAT_QUARTZ64
• PLAT_ROCKPRO64
• PLAT_TQMA8XQP1GB
• PLAT_TX1
• PLAT_TX2
• PLAT_ZYNQMP
• PRINTING
• RESET_CHUNK_BITS
• RETYPE_FAN_OUT_LIMIT
• ROOT_CNODE_SIZE_BITS
• SEL4_ARCH
• SET_TLS_BASE_SELF
• SIGNAL_FASTPATH
• SMMU_INTERRUPT_ENABLE
• TK1_SMMU
• USER_STACK_TRACE_LENGTH
• VERIFICATION_BUILD
• VTIMER_UPDATE_VOFFSET
• WORD_SIZE