sel4_sys/build/target/aarch64-sel4/debug/build/sel4-sys-5c2f18b3ec6d372e/out/
invocation_labels.rs

1pub const InvalidInvocation: u32 = 0u32;
2pub const UntypedRetype: u32 = 1u32;
3pub const TCBReadRegisters: u32 = 2u32;
4pub const TCBWriteRegisters: u32 = 3u32;
5pub const TCBCopyRegisters: u32 = 4u32;
6pub const TCBConfigure: u32 = 5u32;
7pub const TCBSetPriority: u32 = 6u32;
8pub const TCBSetMCPriority: u32 = 7u32;
9pub const TCBSetSchedParams: u32 = 8u32;
10pub const TCBSetIPCBuffer: u32 = 9u32;
11pub const TCBSetSpace: u32 = 10u32;
12pub const TCBSuspend: u32 = 11u32;
13pub const TCBResume: u32 = 12u32;
14pub const TCBBindNotification: u32 = 13u32;
15pub const TCBUnbindNotification: u32 = 14u32;
16pub const TCBSetAffinity: u32 = 15u32;
17pub const TCBSetTLSBase: u32 = 16u32;
18pub const TCBSetFlags: u32 = 17u32;
19pub const CNodeRevoke: u32 = 18u32;
20pub const CNodeDelete: u32 = 19u32;
21pub const CNodeCancelBadgedSends: u32 = 20u32;
22pub const CNodeCopy: u32 = 21u32;
23pub const CNodeMint: u32 = 22u32;
24pub const CNodeMove: u32 = 23u32;
25pub const CNodeMutate: u32 = 24u32;
26pub const CNodeRotate: u32 = 25u32;
27pub const CNodeSaveCaller: u32 = 26u32;
28pub const IRQIssueIRQHandler: u32 = 27u32;
29pub const IRQAckIRQ: u32 = 28u32;
30pub const IRQSetIRQHandler: u32 = 29u32;
31pub const IRQClearIRQHandler: u32 = 30u32;
32pub const DomainSetSet: u32 = 31u32;
33pub const ARMVSpaceClean_Data: u32 = 32u32;
34pub const ARMVSpaceInvalidate_Data: u32 = 33u32;
35pub const ARMVSpaceCleanInvalidate_Data: u32 = 34u32;
36pub const ARMVSpaceUnify_Instruction: u32 = 35u32;
37pub const ARMSMCCall: u32 = 36u32;
38pub const ARMPageTableMap: u32 = 37u32;
39pub const ARMPageTableUnmap: u32 = 38u32;
40pub const ARMPageMap: u32 = 39u32;
41pub const ARMPageUnmap: u32 = 40u32;
42pub const ARMPageClean_Data: u32 = 41u32;
43pub const ARMPageInvalidate_Data: u32 = 42u32;
44pub const ARMPageCleanInvalidate_Data: u32 = 43u32;
45pub const ARMPageUnify_Instruction: u32 = 44u32;
46pub const ARMPageGetAddress: u32 = 45u32;
47pub const ARMASIDControlMakePool: u32 = 46u32;
48pub const ARMASIDPoolAssign: u32 = 47u32;
49pub const ARMVCPUSetTCB: u32 = 48u32;
50pub const ARMVCPUInjectIRQ: u32 = 49u32;
51pub const ARMVCPUReadReg: u32 = 50u32;
52pub const ARMVCPUWriteReg: u32 = 51u32;
53pub const ARMVCPUAckVPPI: u32 = 52u32;
54pub const ARMIRQIssueIRQHandlerTrigger: u32 = 53u32;
55pub const ARMIRQIssueIRQHandlerTriggerCore: u32 = 54u32;