1#[repr(transparent)]
2#[derive(Clone, Eq, PartialEq)]
3pub struct seL4_Fault_NullFault(pub SeL4Bitfield<u64, 14usize>);
4impl seL4_Fault_NullFault {
5 pub fn new() -> Self {
6 let mut this = Self(Bitfield::zeroed());
7 this.set_seL4_FaultType(seL4_Fault_tag::seL4_Fault_NullFault);
8 this
9 }
10 pub fn unpack(&self) -> seL4_Fault_NullFault_Unpacked {
11 seL4_Fault_NullFault_Unpacked {}
12 }
13 #[allow(dead_code)]
14 fn get_seL4_FaultType(&self) -> u64 {
15 self.0.get_bits(0usize..4usize)
16 }
17 fn set_seL4_FaultType(&mut self, seL4_FaultType: u64) {
18 self.0.set_bits(0usize..4usize, seL4_FaultType)
19 }
20 #[allow(dead_code)]
21 const fn width_of_seL4_FaultType() -> usize {
22 4usize - 0usize
23 }
24}
25impl fmt::Debug for seL4_Fault_NullFault {
26 fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
27 self.unpack().fmt(f)?;
28 write!(f, ".pack()")?;
29 Ok(())
30 }
31}
32#[derive(Debug, Clone, PartialEq, Eq)]
33pub struct seL4_Fault_NullFault_Unpacked {}
34impl seL4_Fault_NullFault_Unpacked {
35 pub fn pack(self) -> seL4_Fault_NullFault {
36 match self {
37 Self {} => seL4_Fault_NullFault::new(),
38 }
39 }
40}
41#[repr(transparent)]
42#[derive(Clone, Eq, PartialEq)]
43pub struct seL4_Fault_CapFault(pub SeL4Bitfield<u64, 14usize>);
44impl seL4_Fault_CapFault {
45 pub fn new(
46 IP: u64,
47 Addr: u64,
48 InRecvPhase: u64,
49 LookupFailureType: u64,
50 MR4: u64,
51 MR5: u64,
52 MR6: u64,
53 ) -> Self {
54 let mut this = Self(Bitfield::zeroed());
55 this.set_IP(IP);
56 this.set_Addr(Addr);
57 this.set_InRecvPhase(InRecvPhase);
58 this.set_LookupFailureType(LookupFailureType);
59 this.set_MR4(MR4);
60 this.set_MR5(MR5);
61 this.set_MR6(MR6);
62 this.set_seL4_FaultType(seL4_Fault_tag::seL4_Fault_CapFault);
63 this
64 }
65 pub fn unpack(&self) -> seL4_Fault_CapFault_Unpacked {
66 seL4_Fault_CapFault_Unpacked {
67 IP: self.get_IP(),
68 Addr: self.get_Addr(),
69 InRecvPhase: self.get_InRecvPhase(),
70 LookupFailureType: self.get_LookupFailureType(),
71 MR4: self.get_MR4(),
72 MR5: self.get_MR5(),
73 MR6: self.get_MR6(),
74 }
75 }
76 #[allow(dead_code)]
77 pub fn get_IP(&self) -> u64 {
78 self.0.get_bits(448usize..512usize)
79 }
80 pub fn set_IP(&mut self, IP: u64) {
81 self.0.set_bits(448usize..512usize, IP)
82 }
83 #[allow(dead_code)]
84 pub const fn width_of_IP() -> usize {
85 512usize - 448usize
86 }
87 #[allow(dead_code)]
88 pub fn get_Addr(&self) -> u64 {
89 self.0.get_bits(384usize..448usize)
90 }
91 pub fn set_Addr(&mut self, Addr: u64) {
92 self.0.set_bits(384usize..448usize, Addr)
93 }
94 #[allow(dead_code)]
95 pub const fn width_of_Addr() -> usize {
96 448usize - 384usize
97 }
98 #[allow(dead_code)]
99 pub fn get_InRecvPhase(&self) -> u64 {
100 self.0.get_bits(320usize..384usize)
101 }
102 pub fn set_InRecvPhase(&mut self, InRecvPhase: u64) {
103 self.0.set_bits(320usize..384usize, InRecvPhase)
104 }
105 #[allow(dead_code)]
106 pub const fn width_of_InRecvPhase() -> usize {
107 384usize - 320usize
108 }
109 #[allow(dead_code)]
110 pub fn get_LookupFailureType(&self) -> u64 {
111 self.0.get_bits(256usize..320usize)
112 }
113 pub fn set_LookupFailureType(&mut self, LookupFailureType: u64) {
114 self.0.set_bits(256usize..320usize, LookupFailureType)
115 }
116 #[allow(dead_code)]
117 pub const fn width_of_LookupFailureType() -> usize {
118 320usize - 256usize
119 }
120 #[allow(dead_code)]
121 pub fn get_MR4(&self) -> u64 {
122 self.0.get_bits(192usize..256usize)
123 }
124 pub fn set_MR4(&mut self, MR4: u64) {
125 self.0.set_bits(192usize..256usize, MR4)
126 }
127 #[allow(dead_code)]
128 pub const fn width_of_MR4() -> usize {
129 256usize - 192usize
130 }
131 #[allow(dead_code)]
132 pub fn get_MR5(&self) -> u64 {
133 self.0.get_bits(128usize..192usize)
134 }
135 pub fn set_MR5(&mut self, MR5: u64) {
136 self.0.set_bits(128usize..192usize, MR5)
137 }
138 #[allow(dead_code)]
139 pub const fn width_of_MR5() -> usize {
140 192usize - 128usize
141 }
142 #[allow(dead_code)]
143 pub fn get_MR6(&self) -> u64 {
144 self.0.get_bits(64usize..128usize)
145 }
146 pub fn set_MR6(&mut self, MR6: u64) {
147 self.0.set_bits(64usize..128usize, MR6)
148 }
149 #[allow(dead_code)]
150 pub const fn width_of_MR6() -> usize {
151 128usize - 64usize
152 }
153 #[allow(dead_code)]
154 fn get_seL4_FaultType(&self) -> u64 {
155 self.0.get_bits(0usize..4usize)
156 }
157 fn set_seL4_FaultType(&mut self, seL4_FaultType: u64) {
158 self.0.set_bits(0usize..4usize, seL4_FaultType)
159 }
160 #[allow(dead_code)]
161 const fn width_of_seL4_FaultType() -> usize {
162 4usize - 0usize
163 }
164}
165impl fmt::Debug for seL4_Fault_CapFault {
166 fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
167 self.unpack().fmt(f)?;
168 write!(f, ".pack()")?;
169 Ok(())
170 }
171}
172#[derive(Debug, Clone, PartialEq, Eq)]
173pub struct seL4_Fault_CapFault_Unpacked {
174 pub IP: u64,
175 pub Addr: u64,
176 pub InRecvPhase: u64,
177 pub LookupFailureType: u64,
178 pub MR4: u64,
179 pub MR5: u64,
180 pub MR6: u64,
181}
182impl seL4_Fault_CapFault_Unpacked {
183 pub fn pack(self) -> seL4_Fault_CapFault {
184 match self {
185 Self { IP, Addr, InRecvPhase, LookupFailureType, MR4, MR5, MR6 } => {
186 seL4_Fault_CapFault::new(
187 IP,
188 Addr,
189 InRecvPhase,
190 LookupFailureType,
191 MR4,
192 MR5,
193 MR6,
194 )
195 }
196 }
197 }
198}
199#[repr(transparent)]
200#[derive(Clone, Eq, PartialEq)]
201pub struct seL4_Fault_UnknownSyscall(pub SeL4Bitfield<u64, 14usize>);
202impl seL4_Fault_UnknownSyscall {
203 pub fn new(
204 X0: u64,
205 X1: u64,
206 X2: u64,
207 X3: u64,
208 X4: u64,
209 X5: u64,
210 X6: u64,
211 X7: u64,
212 FaultIP: u64,
213 SP: u64,
214 LR: u64,
215 SPSR: u64,
216 Syscall: u64,
217 ) -> Self {
218 let mut this = Self(Bitfield::zeroed());
219 this.set_X0(X0);
220 this.set_X1(X1);
221 this.set_X2(X2);
222 this.set_X3(X3);
223 this.set_X4(X4);
224 this.set_X5(X5);
225 this.set_X6(X6);
226 this.set_X7(X7);
227 this.set_FaultIP(FaultIP);
228 this.set_SP(SP);
229 this.set_LR(LR);
230 this.set_SPSR(SPSR);
231 this.set_Syscall(Syscall);
232 this.set_seL4_FaultType(seL4_Fault_tag::seL4_Fault_UnknownSyscall);
233 this
234 }
235 pub fn unpack(&self) -> seL4_Fault_UnknownSyscall_Unpacked {
236 seL4_Fault_UnknownSyscall_Unpacked {
237 X0: self.get_X0(),
238 X1: self.get_X1(),
239 X2: self.get_X2(),
240 X3: self.get_X3(),
241 X4: self.get_X4(),
242 X5: self.get_X5(),
243 X6: self.get_X6(),
244 X7: self.get_X7(),
245 FaultIP: self.get_FaultIP(),
246 SP: self.get_SP(),
247 LR: self.get_LR(),
248 SPSR: self.get_SPSR(),
249 Syscall: self.get_Syscall(),
250 }
251 }
252 #[allow(dead_code)]
253 pub fn get_X0(&self) -> u64 {
254 self.0.get_bits(832usize..896usize)
255 }
256 pub fn set_X0(&mut self, X0: u64) {
257 self.0.set_bits(832usize..896usize, X0)
258 }
259 #[allow(dead_code)]
260 pub const fn width_of_X0() -> usize {
261 896usize - 832usize
262 }
263 #[allow(dead_code)]
264 pub fn get_X1(&self) -> u64 {
265 self.0.get_bits(768usize..832usize)
266 }
267 pub fn set_X1(&mut self, X1: u64) {
268 self.0.set_bits(768usize..832usize, X1)
269 }
270 #[allow(dead_code)]
271 pub const fn width_of_X1() -> usize {
272 832usize - 768usize
273 }
274 #[allow(dead_code)]
275 pub fn get_X2(&self) -> u64 {
276 self.0.get_bits(704usize..768usize)
277 }
278 pub fn set_X2(&mut self, X2: u64) {
279 self.0.set_bits(704usize..768usize, X2)
280 }
281 #[allow(dead_code)]
282 pub const fn width_of_X2() -> usize {
283 768usize - 704usize
284 }
285 #[allow(dead_code)]
286 pub fn get_X3(&self) -> u64 {
287 self.0.get_bits(640usize..704usize)
288 }
289 pub fn set_X3(&mut self, X3: u64) {
290 self.0.set_bits(640usize..704usize, X3)
291 }
292 #[allow(dead_code)]
293 pub const fn width_of_X3() -> usize {
294 704usize - 640usize
295 }
296 #[allow(dead_code)]
297 pub fn get_X4(&self) -> u64 {
298 self.0.get_bits(576usize..640usize)
299 }
300 pub fn set_X4(&mut self, X4: u64) {
301 self.0.set_bits(576usize..640usize, X4)
302 }
303 #[allow(dead_code)]
304 pub const fn width_of_X4() -> usize {
305 640usize - 576usize
306 }
307 #[allow(dead_code)]
308 pub fn get_X5(&self) -> u64 {
309 self.0.get_bits(512usize..576usize)
310 }
311 pub fn set_X5(&mut self, X5: u64) {
312 self.0.set_bits(512usize..576usize, X5)
313 }
314 #[allow(dead_code)]
315 pub const fn width_of_X5() -> usize {
316 576usize - 512usize
317 }
318 #[allow(dead_code)]
319 pub fn get_X6(&self) -> u64 {
320 self.0.get_bits(448usize..512usize)
321 }
322 pub fn set_X6(&mut self, X6: u64) {
323 self.0.set_bits(448usize..512usize, X6)
324 }
325 #[allow(dead_code)]
326 pub const fn width_of_X6() -> usize {
327 512usize - 448usize
328 }
329 #[allow(dead_code)]
330 pub fn get_X7(&self) -> u64 {
331 self.0.get_bits(384usize..448usize)
332 }
333 pub fn set_X7(&mut self, X7: u64) {
334 self.0.set_bits(384usize..448usize, X7)
335 }
336 #[allow(dead_code)]
337 pub const fn width_of_X7() -> usize {
338 448usize - 384usize
339 }
340 #[allow(dead_code)]
341 pub fn get_FaultIP(&self) -> u64 {
342 self.0.get_bits(320usize..384usize)
343 }
344 pub fn set_FaultIP(&mut self, FaultIP: u64) {
345 self.0.set_bits(320usize..384usize, FaultIP)
346 }
347 #[allow(dead_code)]
348 pub const fn width_of_FaultIP() -> usize {
349 384usize - 320usize
350 }
351 #[allow(dead_code)]
352 pub fn get_SP(&self) -> u64 {
353 self.0.get_bits(256usize..320usize)
354 }
355 pub fn set_SP(&mut self, SP: u64) {
356 self.0.set_bits(256usize..320usize, SP)
357 }
358 #[allow(dead_code)]
359 pub const fn width_of_SP() -> usize {
360 320usize - 256usize
361 }
362 #[allow(dead_code)]
363 pub fn get_LR(&self) -> u64 {
364 self.0.get_bits(192usize..256usize)
365 }
366 pub fn set_LR(&mut self, LR: u64) {
367 self.0.set_bits(192usize..256usize, LR)
368 }
369 #[allow(dead_code)]
370 pub const fn width_of_LR() -> usize {
371 256usize - 192usize
372 }
373 #[allow(dead_code)]
374 pub fn get_SPSR(&self) -> u64 {
375 self.0.get_bits(128usize..192usize)
376 }
377 pub fn set_SPSR(&mut self, SPSR: u64) {
378 self.0.set_bits(128usize..192usize, SPSR)
379 }
380 #[allow(dead_code)]
381 pub const fn width_of_SPSR() -> usize {
382 192usize - 128usize
383 }
384 #[allow(dead_code)]
385 pub fn get_Syscall(&self) -> u64 {
386 self.0.get_bits(64usize..128usize)
387 }
388 pub fn set_Syscall(&mut self, Syscall: u64) {
389 self.0.set_bits(64usize..128usize, Syscall)
390 }
391 #[allow(dead_code)]
392 pub const fn width_of_Syscall() -> usize {
393 128usize - 64usize
394 }
395 #[allow(dead_code)]
396 fn get_seL4_FaultType(&self) -> u64 {
397 self.0.get_bits(0usize..4usize)
398 }
399 fn set_seL4_FaultType(&mut self, seL4_FaultType: u64) {
400 self.0.set_bits(0usize..4usize, seL4_FaultType)
401 }
402 #[allow(dead_code)]
403 const fn width_of_seL4_FaultType() -> usize {
404 4usize - 0usize
405 }
406}
407impl fmt::Debug for seL4_Fault_UnknownSyscall {
408 fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
409 self.unpack().fmt(f)?;
410 write!(f, ".pack()")?;
411 Ok(())
412 }
413}
414#[derive(Debug, Clone, PartialEq, Eq)]
415pub struct seL4_Fault_UnknownSyscall_Unpacked {
416 pub X0: u64,
417 pub X1: u64,
418 pub X2: u64,
419 pub X3: u64,
420 pub X4: u64,
421 pub X5: u64,
422 pub X6: u64,
423 pub X7: u64,
424 pub FaultIP: u64,
425 pub SP: u64,
426 pub LR: u64,
427 pub SPSR: u64,
428 pub Syscall: u64,
429}
430impl seL4_Fault_UnknownSyscall_Unpacked {
431 pub fn pack(self) -> seL4_Fault_UnknownSyscall {
432 match self {
433 Self { X0, X1, X2, X3, X4, X5, X6, X7, FaultIP, SP, LR, SPSR, Syscall } => {
434 seL4_Fault_UnknownSyscall::new(
435 X0,
436 X1,
437 X2,
438 X3,
439 X4,
440 X5,
441 X6,
442 X7,
443 FaultIP,
444 SP,
445 LR,
446 SPSR,
447 Syscall,
448 )
449 }
450 }
451 }
452}
453#[repr(transparent)]
454#[derive(Clone, Eq, PartialEq)]
455pub struct seL4_Fault_UserException(pub SeL4Bitfield<u64, 14usize>);
456impl seL4_Fault_UserException {
457 pub fn new(FaultIP: u64, Stack: u64, SPSR: u64, Number: u64, Code: u64) -> Self {
458 let mut this = Self(Bitfield::zeroed());
459 this.set_FaultIP(FaultIP);
460 this.set_Stack(Stack);
461 this.set_SPSR(SPSR);
462 this.set_Number(Number);
463 this.set_Code(Code);
464 this.set_seL4_FaultType(seL4_Fault_tag::seL4_Fault_UserException);
465 this
466 }
467 pub fn unpack(&self) -> seL4_Fault_UserException_Unpacked {
468 seL4_Fault_UserException_Unpacked {
469 FaultIP: self.get_FaultIP(),
470 Stack: self.get_Stack(),
471 SPSR: self.get_SPSR(),
472 Number: self.get_Number(),
473 Code: self.get_Code(),
474 }
475 }
476 #[allow(dead_code)]
477 pub fn get_FaultIP(&self) -> u64 {
478 self.0.get_bits(320usize..384usize)
479 }
480 pub fn set_FaultIP(&mut self, FaultIP: u64) {
481 self.0.set_bits(320usize..384usize, FaultIP)
482 }
483 #[allow(dead_code)]
484 pub const fn width_of_FaultIP() -> usize {
485 384usize - 320usize
486 }
487 #[allow(dead_code)]
488 pub fn get_Stack(&self) -> u64 {
489 self.0.get_bits(256usize..320usize)
490 }
491 pub fn set_Stack(&mut self, Stack: u64) {
492 self.0.set_bits(256usize..320usize, Stack)
493 }
494 #[allow(dead_code)]
495 pub const fn width_of_Stack() -> usize {
496 320usize - 256usize
497 }
498 #[allow(dead_code)]
499 pub fn get_SPSR(&self) -> u64 {
500 self.0.get_bits(192usize..256usize)
501 }
502 pub fn set_SPSR(&mut self, SPSR: u64) {
503 self.0.set_bits(192usize..256usize, SPSR)
504 }
505 #[allow(dead_code)]
506 pub const fn width_of_SPSR() -> usize {
507 256usize - 192usize
508 }
509 #[allow(dead_code)]
510 pub fn get_Number(&self) -> u64 {
511 self.0.get_bits(128usize..192usize)
512 }
513 pub fn set_Number(&mut self, Number: u64) {
514 self.0.set_bits(128usize..192usize, Number)
515 }
516 #[allow(dead_code)]
517 pub const fn width_of_Number() -> usize {
518 192usize - 128usize
519 }
520 #[allow(dead_code)]
521 pub fn get_Code(&self) -> u64 {
522 self.0.get_bits(64usize..128usize)
523 }
524 pub fn set_Code(&mut self, Code: u64) {
525 self.0.set_bits(64usize..128usize, Code)
526 }
527 #[allow(dead_code)]
528 pub const fn width_of_Code() -> usize {
529 128usize - 64usize
530 }
531 #[allow(dead_code)]
532 fn get_seL4_FaultType(&self) -> u64 {
533 self.0.get_bits(0usize..4usize)
534 }
535 fn set_seL4_FaultType(&mut self, seL4_FaultType: u64) {
536 self.0.set_bits(0usize..4usize, seL4_FaultType)
537 }
538 #[allow(dead_code)]
539 const fn width_of_seL4_FaultType() -> usize {
540 4usize - 0usize
541 }
542}
543impl fmt::Debug for seL4_Fault_UserException {
544 fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
545 self.unpack().fmt(f)?;
546 write!(f, ".pack()")?;
547 Ok(())
548 }
549}
550#[derive(Debug, Clone, PartialEq, Eq)]
551pub struct seL4_Fault_UserException_Unpacked {
552 pub FaultIP: u64,
553 pub Stack: u64,
554 pub SPSR: u64,
555 pub Number: u64,
556 pub Code: u64,
557}
558impl seL4_Fault_UserException_Unpacked {
559 pub fn pack(self) -> seL4_Fault_UserException {
560 match self {
561 Self { FaultIP, Stack, SPSR, Number, Code } => {
562 seL4_Fault_UserException::new(FaultIP, Stack, SPSR, Number, Code)
563 }
564 }
565 }
566}
567#[repr(transparent)]
568#[derive(Clone, Eq, PartialEq)]
569pub struct seL4_Fault_VMFault(pub SeL4Bitfield<u64, 14usize>);
570impl seL4_Fault_VMFault {
571 pub fn new(IP: u64, Addr: u64, PrefetchFault: u64, FSR: u64) -> Self {
572 let mut this = Self(Bitfield::zeroed());
573 this.set_IP(IP);
574 this.set_Addr(Addr);
575 this.set_PrefetchFault(PrefetchFault);
576 this.set_FSR(FSR);
577 this.set_seL4_FaultType(seL4_Fault_tag::seL4_Fault_VMFault);
578 this
579 }
580 pub fn unpack(&self) -> seL4_Fault_VMFault_Unpacked {
581 seL4_Fault_VMFault_Unpacked {
582 IP: self.get_IP(),
583 Addr: self.get_Addr(),
584 PrefetchFault: self.get_PrefetchFault(),
585 FSR: self.get_FSR(),
586 }
587 }
588 #[allow(dead_code)]
589 pub fn get_IP(&self) -> u64 {
590 self.0.get_bits(256usize..320usize)
591 }
592 pub fn set_IP(&mut self, IP: u64) {
593 self.0.set_bits(256usize..320usize, IP)
594 }
595 #[allow(dead_code)]
596 pub const fn width_of_IP() -> usize {
597 320usize - 256usize
598 }
599 #[allow(dead_code)]
600 pub fn get_Addr(&self) -> u64 {
601 self.0.get_bits(192usize..256usize)
602 }
603 pub fn set_Addr(&mut self, Addr: u64) {
604 self.0.set_bits(192usize..256usize, Addr)
605 }
606 #[allow(dead_code)]
607 pub const fn width_of_Addr() -> usize {
608 256usize - 192usize
609 }
610 #[allow(dead_code)]
611 pub fn get_PrefetchFault(&self) -> u64 {
612 self.0.get_bits(128usize..192usize)
613 }
614 pub fn set_PrefetchFault(&mut self, PrefetchFault: u64) {
615 self.0.set_bits(128usize..192usize, PrefetchFault)
616 }
617 #[allow(dead_code)]
618 pub const fn width_of_PrefetchFault() -> usize {
619 192usize - 128usize
620 }
621 #[allow(dead_code)]
622 pub fn get_FSR(&self) -> u64 {
623 self.0.get_bits(64usize..128usize)
624 }
625 pub fn set_FSR(&mut self, FSR: u64) {
626 self.0.set_bits(64usize..128usize, FSR)
627 }
628 #[allow(dead_code)]
629 pub const fn width_of_FSR() -> usize {
630 128usize - 64usize
631 }
632 #[allow(dead_code)]
633 fn get_seL4_FaultType(&self) -> u64 {
634 self.0.get_bits(0usize..4usize)
635 }
636 fn set_seL4_FaultType(&mut self, seL4_FaultType: u64) {
637 self.0.set_bits(0usize..4usize, seL4_FaultType)
638 }
639 #[allow(dead_code)]
640 const fn width_of_seL4_FaultType() -> usize {
641 4usize - 0usize
642 }
643}
644impl fmt::Debug for seL4_Fault_VMFault {
645 fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
646 self.unpack().fmt(f)?;
647 write!(f, ".pack()")?;
648 Ok(())
649 }
650}
651#[derive(Debug, Clone, PartialEq, Eq)]
652pub struct seL4_Fault_VMFault_Unpacked {
653 pub IP: u64,
654 pub Addr: u64,
655 pub PrefetchFault: u64,
656 pub FSR: u64,
657}
658impl seL4_Fault_VMFault_Unpacked {
659 pub fn pack(self) -> seL4_Fault_VMFault {
660 match self {
661 Self { IP, Addr, PrefetchFault, FSR } => {
662 seL4_Fault_VMFault::new(IP, Addr, PrefetchFault, FSR)
663 }
664 }
665 }
666}
667#[repr(transparent)]
668#[derive(Clone, Eq, PartialEq)]
669pub struct seL4_Fault_VGICMaintenance(pub SeL4Bitfield<u64, 14usize>);
670impl seL4_Fault_VGICMaintenance {
671 pub fn new(IDX: u64) -> Self {
672 let mut this = Self(Bitfield::zeroed());
673 this.set_IDX(IDX);
674 this.set_seL4_FaultType(seL4_Fault_tag::seL4_Fault_VGICMaintenance);
675 this
676 }
677 pub fn unpack(&self) -> seL4_Fault_VGICMaintenance_Unpacked {
678 seL4_Fault_VGICMaintenance_Unpacked {
679 IDX: self.get_IDX(),
680 }
681 }
682 #[allow(dead_code)]
683 pub fn get_IDX(&self) -> u64 {
684 self.0.get_bits(64usize..128usize)
685 }
686 pub fn set_IDX(&mut self, IDX: u64) {
687 self.0.set_bits(64usize..128usize, IDX)
688 }
689 #[allow(dead_code)]
690 pub const fn width_of_IDX() -> usize {
691 128usize - 64usize
692 }
693 #[allow(dead_code)]
694 fn get_seL4_FaultType(&self) -> u64 {
695 self.0.get_bits(0usize..4usize)
696 }
697 fn set_seL4_FaultType(&mut self, seL4_FaultType: u64) {
698 self.0.set_bits(0usize..4usize, seL4_FaultType)
699 }
700 #[allow(dead_code)]
701 const fn width_of_seL4_FaultType() -> usize {
702 4usize - 0usize
703 }
704}
705impl fmt::Debug for seL4_Fault_VGICMaintenance {
706 fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
707 self.unpack().fmt(f)?;
708 write!(f, ".pack()")?;
709 Ok(())
710 }
711}
712#[derive(Debug, Clone, PartialEq, Eq)]
713pub struct seL4_Fault_VGICMaintenance_Unpacked {
714 pub IDX: u64,
715}
716impl seL4_Fault_VGICMaintenance_Unpacked {
717 pub fn pack(self) -> seL4_Fault_VGICMaintenance {
718 match self {
719 Self { IDX } => seL4_Fault_VGICMaintenance::new(IDX),
720 }
721 }
722}
723#[repr(transparent)]
724#[derive(Clone, Eq, PartialEq)]
725pub struct seL4_Fault_VCPUFault(pub SeL4Bitfield<u64, 14usize>);
726impl seL4_Fault_VCPUFault {
727 pub fn new(HSR: u64) -> Self {
728 let mut this = Self(Bitfield::zeroed());
729 this.set_HSR(HSR);
730 this.set_seL4_FaultType(seL4_Fault_tag::seL4_Fault_VCPUFault);
731 this
732 }
733 pub fn unpack(&self) -> seL4_Fault_VCPUFault_Unpacked {
734 seL4_Fault_VCPUFault_Unpacked {
735 HSR: self.get_HSR(),
736 }
737 }
738 #[allow(dead_code)]
739 pub fn get_HSR(&self) -> u64 {
740 self.0.get_bits(64usize..96usize)
741 }
742 pub fn set_HSR(&mut self, HSR: u64) {
743 self.0.set_bits(64usize..96usize, HSR)
744 }
745 #[allow(dead_code)]
746 pub const fn width_of_HSR() -> usize {
747 96usize - 64usize
748 }
749 #[allow(dead_code)]
750 fn get_seL4_FaultType(&self) -> u64 {
751 self.0.get_bits(0usize..4usize)
752 }
753 fn set_seL4_FaultType(&mut self, seL4_FaultType: u64) {
754 self.0.set_bits(0usize..4usize, seL4_FaultType)
755 }
756 #[allow(dead_code)]
757 const fn width_of_seL4_FaultType() -> usize {
758 4usize - 0usize
759 }
760}
761impl fmt::Debug for seL4_Fault_VCPUFault {
762 fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
763 self.unpack().fmt(f)?;
764 write!(f, ".pack()")?;
765 Ok(())
766 }
767}
768#[derive(Debug, Clone, PartialEq, Eq)]
769pub struct seL4_Fault_VCPUFault_Unpacked {
770 pub HSR: u64,
771}
772impl seL4_Fault_VCPUFault_Unpacked {
773 pub fn pack(self) -> seL4_Fault_VCPUFault {
774 match self {
775 Self { HSR } => seL4_Fault_VCPUFault::new(HSR),
776 }
777 }
778}
779#[repr(transparent)]
780#[derive(Clone, Eq, PartialEq)]
781pub struct seL4_Fault_VPPIEvent(pub SeL4Bitfield<u64, 14usize>);
782impl seL4_Fault_VPPIEvent {
783 pub fn new(irq: u64) -> Self {
784 let mut this = Self(Bitfield::zeroed());
785 this.set_irq(irq);
786 this.set_seL4_FaultType(seL4_Fault_tag::seL4_Fault_VPPIEvent);
787 this
788 }
789 pub fn unpack(&self) -> seL4_Fault_VPPIEvent_Unpacked {
790 seL4_Fault_VPPIEvent_Unpacked {
791 irq: self.get_irq(),
792 }
793 }
794 #[allow(dead_code)]
795 pub fn get_irq(&self) -> u64 {
796 self.0.get_bits(64usize..128usize)
797 }
798 pub fn set_irq(&mut self, irq: u64) {
799 self.0.set_bits(64usize..128usize, irq)
800 }
801 #[allow(dead_code)]
802 pub const fn width_of_irq() -> usize {
803 128usize - 64usize
804 }
805 #[allow(dead_code)]
806 fn get_seL4_FaultType(&self) -> u64 {
807 self.0.get_bits(0usize..4usize)
808 }
809 fn set_seL4_FaultType(&mut self, seL4_FaultType: u64) {
810 self.0.set_bits(0usize..4usize, seL4_FaultType)
811 }
812 #[allow(dead_code)]
813 const fn width_of_seL4_FaultType() -> usize {
814 4usize - 0usize
815 }
816}
817impl fmt::Debug for seL4_Fault_VPPIEvent {
818 fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
819 self.unpack().fmt(f)?;
820 write!(f, ".pack()")?;
821 Ok(())
822 }
823}
824#[derive(Debug, Clone, PartialEq, Eq)]
825pub struct seL4_Fault_VPPIEvent_Unpacked {
826 pub irq: u64,
827}
828impl seL4_Fault_VPPIEvent_Unpacked {
829 pub fn pack(self) -> seL4_Fault_VPPIEvent {
830 match self {
831 Self { irq } => seL4_Fault_VPPIEvent::new(irq),
832 }
833 }
834}
835pub mod seL4_Fault_tag {
836 pub const seL4_Fault_NullFault: u64 = 0;
837 pub const seL4_Fault_CapFault: u64 = 1;
838 pub const seL4_Fault_UnknownSyscall: u64 = 2;
839 pub const seL4_Fault_UserException: u64 = 3;
840 pub const seL4_Fault_VMFault: u64 = 5;
841 pub const seL4_Fault_VGICMaintenance: u64 = 6;
842 pub const seL4_Fault_VCPUFault: u64 = 7;
843 pub const seL4_Fault_VPPIEvent: u64 = 8;
844}
845#[repr(transparent)]
846#[derive(Clone, PartialEq, Eq)]
847pub struct seL4_Fault(pub SeL4Bitfield<u64, 14usize>);
848impl seL4_Fault {
849 pub fn splay(self) -> seL4_Fault_Splayed {
850 match self.get_tag() {
851 seL4_Fault_tag::seL4_Fault_NullFault => {
852 seL4_Fault_Splayed::NullFault(seL4_Fault_NullFault(self.0))
853 }
854 seL4_Fault_tag::seL4_Fault_CapFault => {
855 seL4_Fault_Splayed::CapFault(seL4_Fault_CapFault(self.0))
856 }
857 seL4_Fault_tag::seL4_Fault_UnknownSyscall => {
858 seL4_Fault_Splayed::UnknownSyscall(seL4_Fault_UnknownSyscall(self.0))
859 }
860 seL4_Fault_tag::seL4_Fault_UserException => {
861 seL4_Fault_Splayed::UserException(seL4_Fault_UserException(self.0))
862 }
863 seL4_Fault_tag::seL4_Fault_VMFault => {
864 seL4_Fault_Splayed::VMFault(seL4_Fault_VMFault(self.0))
865 }
866 seL4_Fault_tag::seL4_Fault_VGICMaintenance => {
867 seL4_Fault_Splayed::VGICMaintenance(seL4_Fault_VGICMaintenance(self.0))
868 }
869 seL4_Fault_tag::seL4_Fault_VCPUFault => {
870 seL4_Fault_Splayed::VCPUFault(seL4_Fault_VCPUFault(self.0))
871 }
872 seL4_Fault_tag::seL4_Fault_VPPIEvent => {
873 seL4_Fault_Splayed::VPPIEvent(seL4_Fault_VPPIEvent(self.0))
874 }
875 _ => panic!(),
876 }
877 }
878 pub fn get_tag(&self) -> u64 {
879 self.0.get_bits(0usize..4usize)
880 }
881}
882impl fmt::Debug for seL4_Fault {
883 fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result {
884 self.clone().splay().fmt(f)?;
885 write!(f, ".unsplay()")?;
886 Ok(())
887 }
888}
889#[derive(Debug, Clone, PartialEq, Eq)]
890pub enum seL4_Fault_Splayed {
891 NullFault(seL4_Fault_NullFault),
892 CapFault(seL4_Fault_CapFault),
893 UnknownSyscall(seL4_Fault_UnknownSyscall),
894 UserException(seL4_Fault_UserException),
895 VMFault(seL4_Fault_VMFault),
896 VGICMaintenance(seL4_Fault_VGICMaintenance),
897 VCPUFault(seL4_Fault_VCPUFault),
898 VPPIEvent(seL4_Fault_VPPIEvent),
899}
900impl seL4_Fault_Splayed {
901 pub fn unsplay(self) -> seL4_Fault {
902 match self {
903 seL4_Fault_Splayed::NullFault(seL4_Fault_NullFault(bitfield)) => {
904 seL4_Fault(bitfield)
905 }
906 seL4_Fault_Splayed::CapFault(seL4_Fault_CapFault(bitfield)) => {
907 seL4_Fault(bitfield)
908 }
909 seL4_Fault_Splayed::UnknownSyscall(seL4_Fault_UnknownSyscall(bitfield)) => {
910 seL4_Fault(bitfield)
911 }
912 seL4_Fault_Splayed::UserException(seL4_Fault_UserException(bitfield)) => {
913 seL4_Fault(bitfield)
914 }
915 seL4_Fault_Splayed::VMFault(seL4_Fault_VMFault(bitfield)) => {
916 seL4_Fault(bitfield)
917 }
918 seL4_Fault_Splayed::VGICMaintenance(seL4_Fault_VGICMaintenance(bitfield)) => {
919 seL4_Fault(bitfield)
920 }
921 seL4_Fault_Splayed::VCPUFault(seL4_Fault_VCPUFault(bitfield)) => {
922 seL4_Fault(bitfield)
923 }
924 seL4_Fault_Splayed::VPPIEvent(seL4_Fault_VPPIEvent(bitfield)) => {
925 seL4_Fault(bitfield)
926 }
927 }
928 }
929}
930impl seL4_Fault_NullFault {
931 pub fn unsplay(self) -> seL4_Fault {
932 seL4_Fault(self.0)
933 }
934}
935impl seL4_Fault_NullFault_Unpacked {
936 pub fn unsplay(self) -> seL4_Fault {
937 self.pack().unsplay()
938 }
939}
940impl seL4_Fault_CapFault {
941 pub fn unsplay(self) -> seL4_Fault {
942 seL4_Fault(self.0)
943 }
944}
945impl seL4_Fault_CapFault_Unpacked {
946 pub fn unsplay(self) -> seL4_Fault {
947 self.pack().unsplay()
948 }
949}
950impl seL4_Fault_UnknownSyscall {
951 pub fn unsplay(self) -> seL4_Fault {
952 seL4_Fault(self.0)
953 }
954}
955impl seL4_Fault_UnknownSyscall_Unpacked {
956 pub fn unsplay(self) -> seL4_Fault {
957 self.pack().unsplay()
958 }
959}
960impl seL4_Fault_UserException {
961 pub fn unsplay(self) -> seL4_Fault {
962 seL4_Fault(self.0)
963 }
964}
965impl seL4_Fault_UserException_Unpacked {
966 pub fn unsplay(self) -> seL4_Fault {
967 self.pack().unsplay()
968 }
969}
970impl seL4_Fault_VMFault {
971 pub fn unsplay(self) -> seL4_Fault {
972 seL4_Fault(self.0)
973 }
974}
975impl seL4_Fault_VMFault_Unpacked {
976 pub fn unsplay(self) -> seL4_Fault {
977 self.pack().unsplay()
978 }
979}
980impl seL4_Fault_VGICMaintenance {
981 pub fn unsplay(self) -> seL4_Fault {
982 seL4_Fault(self.0)
983 }
984}
985impl seL4_Fault_VGICMaintenance_Unpacked {
986 pub fn unsplay(self) -> seL4_Fault {
987 self.pack().unsplay()
988 }
989}
990impl seL4_Fault_VCPUFault {
991 pub fn unsplay(self) -> seL4_Fault {
992 seL4_Fault(self.0)
993 }
994}
995impl seL4_Fault_VCPUFault_Unpacked {
996 pub fn unsplay(self) -> seL4_Fault {
997 self.pack().unsplay()
998 }
999}
1000impl seL4_Fault_VPPIEvent {
1001 pub fn unsplay(self) -> seL4_Fault {
1002 seL4_Fault(self.0)
1003 }
1004}
1005impl seL4_Fault_VPPIEvent_Unpacked {
1006 pub fn unsplay(self) -> seL4_Fault {
1007 self.pack().unsplay()
1008 }
1009}