Expand description
The kernel configuration as const items.
While this module can be used as an alternative to the sel4_cfg_*! macros for accessing
the kernel configuration at the value level, its primary purpose is to provide a reference
within Rustdoc for the active configuration. Towards that end, the generated source of this
module is also provided in this module’s Rustdoc to make browsing easier.
pub const AARCH64_SERROR_IGNORE: bool = false;
pub const ARCH: &str = "riscv";
pub const ARCH_AARCH32: bool = false;
pub const ARCH_AARCH64: bool = false;
pub const ARCH_ARM_HYP: bool = false;
pub const ARCH_ARM_V7A: bool = false;
pub const ARCH_ARM_V7VE: bool = false;
pub const ARCH_ARM_V8A: bool = false;
pub const ARCH_IA32: bool = false;
pub const ARCH_RISCV: bool = true;
pub const ARCH_RISCV32: bool = true;
pub const ARCH_RISCV64: bool = false;
pub const ARCH_X86_64: bool = false;
pub const ARM_CORTEX_A15: bool = false;
pub const ARM_CORTEX_A35: bool = false;
pub const ARM_CORTEX_A53: bool = false;
pub const ARM_CORTEX_A55: bool = false;
pub const ARM_CORTEX_A57: bool = false;
pub const ARM_CORTEX_A7: bool = false;
pub const ARM_CORTEX_A72: bool = false;
pub const ARM_CORTEX_A8: bool = false;
pub const ARM_CORTEX_A9: bool = false;
pub const ARM_HIKEY_OUTSTANDING_PREFETCHERS: &str = "0";
pub const ARM_HIKEY_PREFETCHER_NPFSTRM: &str = "0";
pub const ARM_HIKEY_PREFETCHER_STBPFDIS: bool = false;
pub const ARM_HIKEY_PREFETCHER_STBPFRS: bool = false;
pub const ARM_HIKEY_PREFETCHER_STRIDE: &str = "0";
pub const BENCHMARK_GENERIC: bool = false;
pub const BENCHMARK_TRACEPOINTS: bool = false;
pub const BENCHMARK_TRACK_KERNEL_ENTRIES: bool = false;
pub const BENCHMARK_TRACK_UTILISATION: bool = false;
pub const BINARY_VERIFICATION_BUILD: bool = false;
pub const CLZ_32: bool = true;
pub const CLZ_64: bool = false;
pub const CLZ_NO_BUILTIN: bool = false;
pub const COLOUR_PRINTING: bool = true;
pub const CTZ_32: bool = true;
pub const CTZ_64: bool = false;
pub const CTZ_NO_BUILTIN: bool = false;
pub const DANGEROUS_CODE_INJECTION: bool = false;
pub const DEBUG_BUILD: bool = true;
pub const DEBUG_DISABLE_PREFETCHERS: bool = false;
pub const ENABLE_BENCHMARKS: bool = false;
pub const ENABLE_SMP_SUPPORT: bool = false;
pub const EXCEPTION_FASTPATH: bool = false;
pub const EXPORT_PCNT_USER: bool = false;
pub const EXPORT_PTMR_USER: bool = false;
pub const EXPORT_VCNT_USER: bool = false;
pub const EXPORT_VTMR_USER: bool = false;
pub const FASTPATH: bool = true;
pub const FIRST_HART_ID: &str = "0";
pub const HARDWARE_DEBUG_API: bool = false;
pub const HAVE_FPU: bool = false;
pub const IRQ_REPORTING: bool = true;
pub const KERNEL_BENCHMARK: &str = "none";
pub const KERNEL_FWHOLE_PROGRAM: bool = false;
pub const KERNEL_INVOCATION_REPORT_ERROR_IPC: bool = false;
pub const KERNEL_LOG_BUFFER: bool = false;
pub const KERNEL_MCS: bool = false;
pub const KERNEL_OPTIMISATION_CLONE_FUNCTIONS: bool = true;
pub const KERNEL_OPT_LEVEL: &str = "-O2";
pub const KERNEL_OPT_LEVEL_O0: bool = false;
pub const KERNEL_OPT_LEVEL_O1: bool = false;
pub const KERNEL_OPT_LEVEL_O2: bool = true;
pub const KERNEL_OPT_LEVEL_O3: bool = false;
pub const KERNEL_OPT_LEVEL_OS: bool = false;
pub const KERNEL_STACK_BITS: &str = "12";
pub const LIB_SEL4_DEFAULT_FUNCTION_ATTRIBUTES: bool = false;
pub const LIB_SEL4_FUNCTION_ATTRIBUTE: &str = "inline";
pub const LIB_SEL4_INLINE_INVOCATIONS: bool = true;
pub const LIB_SEL4_PRINT_INVOCATION_ERRORS: &str = "0";
pub const LIB_SEL4_PUBLIC_SYMBOLS: bool = false;
pub const LIB_SEL4_STUBS_USE_IPC_BUFFER_ONLY: bool = false;
pub const MAX_NUM_BOOTINFO_UNTYPED_CAPS: &str = "230";
pub const MAX_NUM_NODES: &str = "1";
pub const MAX_NUM_TRACE_POINTS: &str = "0";
pub const MAX_NUM_WORK_UNITS_PER_PREEMPTION: &str = "100";
pub const NO_BENCHMARKS: bool = true;
pub const NUM_DOMAINS: &str = "1";
pub const NUM_PRIORITIES: &str = "256";
pub const OPENSBI_PLATFORM: &str = "generic";
pub const PADDR_USER_DEVICE_TOP: &str = "4294967295";
pub const PLAT: &str = "spike";
pub const PLAT_ARIANE: bool = false;
pub const PLAT_IMX7: bool = false;
pub const PLAT_QEMU_RISCV_VIRT: bool = false;
pub const PLAT_ROCKETCHIP: bool = false;
pub const PLAT_SPIKE: bool = true;
pub const PLAT_STAR64: bool = false;
pub const PRINTING: bool = true;
pub const PT_LEVELS: &str = "2";
pub const RESET_CHUNK_BITS: &str = "8";
pub const RETYPE_FAN_OUT_LIMIT: &str = "256";
pub const RISCV_EXT_D: bool = false;
pub const RISCV_EXT_F: bool = false;
pub const RISCV_PLAT: &str = "spike";
pub const RISCV_USE_CLINT_MTIME: bool = false;
pub const ROOT_CNODE_SIZE_BITS: &str = "20";
pub const SEL4_ARCH: &str = "riscv32";
pub const SET_TLS_BASE_SELF: bool = false;
pub const SIGNAL_FASTPATH: bool = false;
pub const TIMER_TICK_MS: &str = "2";
pub const TIME_SLICE: &str = "5";
pub const USER_STACK_TRACE_LENGTH: &str = "16";
pub const VERIFICATION_BUILD: bool = false;
pub const VTIMER_UPDATE_VOFFSET: bool = true;
pub const WORD_SIZE: &str = "32";