sel4_runtime_common/start/
with_stack_init.rs

1//
2// Copyright 2023, Colias Group, LLC
3//
4// SPDX-License-Identifier: BSD-2-Clause
5//
6
7use core::arch::global_asm;
8
9#[macro_export]
10macro_rules! declare_stack {
11    ($size:expr) => {
12        const _: () = {
13            #[allow(non_upper_case_globals)]
14            #[unsafe(no_mangle)]
15            static __sel4_runtime_common__stack_bottom: $crate::_private::StackBottom = {
16                static STACK: $crate::_private::Stack<{ $size }> = $crate::_private::Stack::new();
17                STACK.bottom()
18            };
19        };
20    };
21}
22
23#[macro_export]
24macro_rules! declare_entrypoint_with_stack_init {
25    ($f:ident($( $i:ident: $t:ty ),* $(,)?)) => {
26        const _: () = {
27            #[unsafe(no_mangle)]
28            unsafe extern "C" fn __sel4_runtime_common__rust_entrypoint($($i: $t,)*) -> ! {
29                $crate::_private::_run_entrypoint(true, || {
30                    $f($($i,)*)
31                });
32            }
33        };
34
35        $crate::_private::global_asm! {
36            r#"
37                .extern __sel4_runtime_common__stack_init
38
39                .section .text
40
41                .global _start
42                _start:
43            "#,
44            #[cfg(any(target_arch = "aarch64", target_arch = "arm"))]
45            r#"
46                    b __sel4_runtime_common__stack_init
47            "#,
48            #[cfg(any(target_arch = "riscv64", target_arch = "riscv32"))]
49            r#"
50                    j __sel4_runtime_common__stack_init
51            "#,
52            #[cfg(target_arch = "x86_64")]
53            r#"
54                    jmp __sel4_runtime_common__stack_init
55            "#,
56        }
57    };
58}
59
60global_asm! {
61    r#"
62        .extern __sel4_runtime_common__stack_bottom
63        .extern __sel4_runtime_common__call_rust_entrypoint
64
65        .section .text.__sel4_runtime_common__stack_init, "ax", %progbits
66
67        .global __sel4_runtime_common__stack_init
68        __sel4_runtime_common__stack_init:
69    "#,
70    #[cfg(target_arch = "aarch64")]
71    r#"
72            ldr x9, =__sel4_runtime_common__stack_bottom
73            ldr x9, [x9]
74            mov sp, x9
75            b __sel4_runtime_common__rust_entrypoint
76    "#,
77    #[cfg(target_arch = "arm")]
78    r#"
79            ldr r8, =__sel4_runtime_common__stack_bottom
80            ldr r8, [r8]
81            mov sp, r8
82            b __sel4_runtime_common__rust_entrypoint
83    "#,
84    #[cfg(target_arch = "riscv64")]
85    r#"
86            la sp, __sel4_runtime_common__stack_bottom
87            ld sp, (sp)
88            j __sel4_runtime_common__rust_entrypoint
89    "#,
90    #[cfg(target_arch = "riscv32")]
91    r#"
92            la sp, __sel4_runtime_common__stack_bottom
93            lw sp, (sp)
94            j __sel4_runtime_common__rust_entrypoint
95    "#,
96    #[cfg(target_arch = "x86_64")]
97    r#"
98            mov rsp, __sel4_runtime_common__stack_bottom
99            mov rbp, rsp
100            sub rsp, 0x8 // Stack must be 16-byte aligned before call
101            push rbp
102            call __sel4_runtime_common__rust_entrypoint
103        1:  jmp 1b
104    "#,
105}
sel4_runtime_common/start/with_stack_init.rs

sel4_runtime_common/start/
with_stack_init.rs
