sel4_pl031_driver/
device.rs
1use core::ops::Deref;
10
11use tock_registers::interfaces::Readable;
12use tock_registers::registers::{ReadOnly, ReadWrite, WriteOnly};
13use tock_registers::{register_bitfields, register_structs};
14
15register_structs! {
16 #[allow(non_snake_case)]
17 pub RtcRegisterBlock {
18 (0x000 => Data: ReadOnly<u32>),
19 (0x004 => Match: ReadWrite<u32>),
20 (0x008 => Load: ReadWrite<u32>),
21 (0x00c => Control: ReadWrite<u32, Control::Register>),
22 (0x010 => IMSC: ReadWrite<u32, IMSC::Register>),
23 (0x014 => RIS: ReadOnly<u32, RIS::Register>),
24 (0x018 => MIS: ReadOnly<u32, MIS::Register>),
25 (0x01c => IC: WriteOnly<u32, IC::Register>),
26 (0x020 => _reserved0),
27 (0xffc => @END),
28 }
29}
30
31register_bitfields! {
32 u32,
33
34 pub Control [
35 Start OFFSET(0) NUMBITS(1) [],
36 ],
37
38 IMSC [
39 IMSC OFFSET(0) NUMBITS(1) [],
40 ],
41
42 RIS [
43 RIS OFFSET(0) NUMBITS(1) [],
44 ],
45
46 MIS [
47 MIS OFFSET(0) NUMBITS(1) [],
48 ],
49
50 IC [
51 IC OFFSET(0) NUMBITS(1) [],
52 ],
53}
54
55pub struct Device {
56 ptr: *const RtcRegisterBlock,
57}
58
59#[allow(dead_code)]
60impl Device {
61 pub const unsafe fn new(ptr: *const ()) -> Self {
62 let ptr = ptr.cast::<RtcRegisterBlock>();
63 Self { ptr }
64 }
65
66 fn ptr(&self) -> *const RtcRegisterBlock {
67 self.ptr
68 }
69
70 pub fn get_data(&self) -> u32 {
71 self.Data.get()
72 }
73}
74
75impl Deref for Device {
76 type Target = RtcRegisterBlock;
77
78 fn deref(&self) -> &Self::Target {
79 unsafe { &*self.ptr() }
80 }
81}